CSCI 1510 Lab 6

For this lab you will have to create TWO projects. One where you build and test the parts and one for the final design. This is necessary to avoid the part limit imposed on the free version of OrCad®

Part 1. Create a 4 to 1 multiplexer (with an Enable) using ONLY NAND gates. Create a part for your multiplexer and test it. You will have to create the stimulus (.stl) file for this simulation.

Parts you may use – 7400 7420. NO OTHER PARTS ARE REQUIRED

Part 2. Create a 3 bit parallel register using a D flip-flop made from a JK. This part (the D from JK flip-flop) was created in Lab 5. If you did not create the part then, you will need to do so now. Create a part and test your register. You need to create the stimulus (.stl) file for this simulation.

Part 3. Create a 3 bit universal shift register. You will need to modify the one shown in your book to do this. Simulate all the functionality of this register. 

Input Table: NOT the same as in the book.

NOTE: You WILL have to create several pSpice simulations to achieve a complete test. Use the add to profile (not add to design) option to avoid potential conflicts between your simulation profiles.

IMPORTANT: When using the add to profile option, each time you edit your .stl file, you will need to edit the simulation profile, delete the existing .stl file, and add the recently edited version.  

Deliverables:

You will need to submit a pdf of all designs, all simulations and all .stl files you create.